1. Field of the Invention
The present invention relates to a variable gain amplifier and more generally to a differential amplifier stage with high input dynamics.
2. Discussion of the Related Art
A conventional differential amplifier stage generally includes two transistors, the emitters (or sources) of which are directly connected to one another and biased by a common current source. It has the advantage of having a high gain and a low noise. However, it has low input dynamic range, that is, it saturates for a particularly low differential input voltage (a few millivolts).
If higher differential voltages are desired to be applied to a differential amplifier stage, the stage is degraded by the insertion of emitter (or source) resistors. A differential stage with a low gain and high noise due to the presence of the emitter resistors in the signal path is thus obtained.
Using a differential stage, a variable-gain amplifier is easily formed. For this purpose, it is enough to adjust the gain via the biasing current of the emitters. In the case of bipolar transistors, the gain varies proportionally to the biasing current.
In most cases where it is desired to use a variable-gain amplifier, the input voltage is likely to vary within a wide range. For low signal levels, the gain is high, while the gain is low for high signal levels, this in order to provide an output signal having substantially constant amplitude.
Then, since the differential stage is likely to receive input voltages of high amplitude, this differential stage is generally of the type including emitter resistors. If the emitter resistances are fixed, the gain obtained for low level voltages is particularly low and requires the use of an additional gain stage. Further, the stage noise, particularly disturbing at low signal levels, is increased by the emitter resistors.
FIG. 1 shows a conventional variable-gain stage which has a particularly high gain for low level signals, while having high input dynamic range.
This stage includes two NPN-type bipolar transistors Q1 and Q2, the bases of which are respectively controlled by the components (V1 and V2) of a differential input voltage. The output signal of the stage is taken between the collectors of transistors Q1 and Q2, which are further connected to a high supply potential Vcc via respective resistors 10 and 11.
The emitters of transistors Q1 and Q2 are interconnected via a chain of resistors 13a to 13f connected in series. Each connection node between two successive resistors 13 is connected to a common current source 15 via a diode D. Current source 15 is further connected to a low supply potential, such as ground GND. The connection node between resistors 13c and 13d is connected to potential Vcc by a resistor 17.
The gain of this stage is adjusted via current source 15, as with a conventional stage. If the current of source 15 is low, this current preferentially passes through resistors 13, whereby transistors Q1 and Q2 see a high impedance between their emitters. Thus, the stage gain is made low by both the low biasing current of source 15 and the high emitter impedance.
If the current of source 15 increases, this current tends to preferentially pass through diodes D, which have low impedances. When the current of source 15 reaches a determined threshold, this current only passes through the chain end diodes D and through resistors 13a and 13f. Thus, the impedance seen by transistors Q1 and Q2 between their emitters is minimum. The stage gain is then high since the biasing current is high and the emitter impedances are minimum.
However, the stage of FIG. 1 exhibits a high noise for low gains due to the presence of a high emitter impedance. Further, since diodes D are non-linear elements which are placed on the path of the input signal, the stage introduces a high distortion.